Technical Field
Embodiments described herein generally relate storage of data. In particular, embodiments described herein generally relate to storage of data in persistent memory.
Background Information
Processors are commonly operable to execute instructions to access memory. For example, processors may execute load instructions to load or read data from main memory and/or store instructions to write or otherwise store data to main memory.
Intel® 64 and IA-32 Architectures Software Developer's Manual Combined Volumes: 1, 2A, 2B, 2C, 3A, 3B and 3C, Order Number: 325462-051US, published June 2014, by Intel Corporation of Santa Clara Calif., describes an SFENCE (store fence) instruction to serialize store operations. The SFENCE instruction may perform a serializing operation on all store-to-memory instructions that were issued prior to the SFENCE instruction. This serializing operation may guarantee that every store instruction that precedes the SFENCE instruction in program order becomes globally visible before any store instruction that follows the SFENCE instruction.